1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory transistor, a nonvolatile semiconductor memory, and a method for manufacturing a nonvolatile semiconductor memory.
2. Description of the Related Art
A flash memory including a control gate and a charge storage layer and designed to inject electric charge into the charge storage layer using hot electron injection, Fowler-Nordheim current, or the like is known. Memory cells of the flash memory record unit data “1” or “0” using the difference in threshold voltage, which depends on the charge storage state of the charge storage layer.
In order to efficiently perform injection of electrons into the charge storage layer and emission of electrons from the charge storage layer, that is, writing and erasing of unit data, the capacitive coupling relationship between a floating gate and a control gate is important. The greater the capacitance between the floating gate and the control gate is, the more effectively the potential of the control gate can be transmitted to the floating gate. Therefore, writing and erasing are facilitated.
In order to increase the capacitance between the floating gate and the control gate, a Tri-Control Gate Surrounding Gate Transistor (TCG-SGT) Flash Memory Cell illustrated in FIG. 57 has been proposed (for example, see Takuya Ohba, Hiroki Nakamura, Hiroshi Sakuraba, Fujio Masuoka, “A novel tri-control gate surrounding gate transistor (TCG-SGT) nonvolatile memory cell for flash memory”, Solid-State Electronics, Vol. 50, No. 6, pp. 924-928, June 2006). Since the control gate of the TCG-SGT flash memory cell has a structure that covers, in addition to the side surface of the floating gate, the upper and lower surfaces of the floating gate, the capacitance between the floating gate and the control gate can be increased, and writing and erasing are facilitated.
However, in the TCG-SGT flash memory cell illustrated in FIG. 57, since the upper and lower portions of the control gate and the outer peripheral wall surface of an island-shaped semiconductor are brought into close proximity to each other with insulating films therebetween, a parasitic capacitance is generated between the control gate and the island-shaped semiconductor. Such a parasitic capacitance between the control gate and the island-shaped semiconductor may cause a reduction in the operating speed of the transistor and is therefore unnecessary.